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Senior Staff FPGA Compiler Software Engineer
San Jose, CAApril 5th, 2026
Job Details:Job Description:Become a member of our world-class software research and development team! Altera develops innovative programmable logic technologies that are easy-to-use and deploy in applications from the cloud to the edge, offering limitless AI possibilities. Our end-to-end broad portfolio of products including FPGAs, CPLDs, Intellectual Property, development tools, System on Modules, SmartNICs and IPUs provide the flexibility to accelerate innovation for many customers worldwide.You will be architecting and developing leading-edge software innovations for Quartus, the tool that optimizes our FPGA devices, within a research-oriented team. Quartus is used by all FPGA acceleration technologies (including High Level Synthesis, FPGA AI Suite, DSP Builder, etc.). The Quartus Router and Retimer optimization engines are key to unlocking high performance, area and power efficiency for our customer's design applications.As part of the Quartus Router and Retimer team, your role will include:Leading research & development efforts to explore novel optimization algorithms for our FPGA CAD software tools, including global and detailed routing as well as state of the art retiming for our Hyperflex routing architectureDeveloping and optimizing the software to drive performance improvements by leveraging innovative FPGA hardware featuresOwning various modules of the Routing and Retiming engine from device modeling to timing closure to runtimeIdeal candidates exhibit the following behavioral traits:Intellectual curiosity and a passion for exploring new technologyExcellent problem-solving, debugging, and attention to detailGreat communication, teamwork, and interpersonal skillsSalary RangeThe pay range below is for Bay Area California only. Actual salary may vary based on a number of factors including job location, job-related knowledge, skills, experiences, trainings, etc. We also offer incentive opportunities that reward employees based on individual and company performance.$200.4- $290.1 USD#LI-CG1Qualifications:Minimum Requirements:Degree in Electrical Engineering, Computer Engineering, Computer Science or related fieldMS + 15 years of industry software experience, or PhD + 10 years of industry software experienceDesired/Preferred Skills:Significant experience coding & hands-on development of high performance multi-core software systemsExtensive experience as an architect/technical lead for developing EDA/CAD routing algorithms for FPGAsProven leadership skills for collaborative cross functional projectsExperience with Altera Quartus or AMD Vivado softwareExperience with graph theory and network based optimizations including pathfinding and combinatorial optimizationsExperience with applying machine learning techniques to EDA softwareJob Type:RegularShift:Shift 1 (United States of America)Primary Location:San Jose, California, United StatesAdditional Locations:Posting Statement:
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